Thursday, May 2025

05:00 PM - 08:00 PM

Room: 220A

Session: Active Matrix Devices Posters

Improved PBTS Reliability of Dual-Gate a-IGZO TFT by Bottom Interface Optimization

Late-News

Description:

We confirm that under PBTS test, the bottom channel of dual-gate IGZO TFT exhibits larger Vth shifts than the top channel. The worse reliability is mainly due to the large amount of oxygen defects at the interface. Therefore, we propose that by increasing the hydrogen content in the bottom gate insulation layer to passivate oxygen defect. The results show that the Vth shift under PBTS decreases from 0.81V to 0.41V.